1. Field of the Disclosure
The disclosure generally relates to a method for forming an isolation film of a semiconductor memory device. More specifically, the disclosure relates to a method of forming an isolation film of a semiconductor memory device in which, when a process of forming the isolation film of the semiconductor memory device using Shallow Trench Isolation (STI) is performed, a cleaning process time using a DHF solution, which is performed from a process of forming a trenches to the process of forming the isolation film, can be shortened to minimize the depth of a moat formed in the isolation film.
2. Brief Description of Related Technology
Generally, in memory devices such as a flash memory device, Shallow Trench Isolation (STI) is employed as an isolation film formation process. The STI has solved a problem that is generated in an existing LOCOS (LOCal Oxidation of Silicon) mode, e.g., a bird's beak phenomenon. Such a STI method includes forming a trench, depositing a High Density Plasma (HDP) oxide film so that the trenches is gap-filled, and then polishing the oxide film using a Chemical Mechanical Polishing (CMP) process to form an isolation film.
In the isolation film formation process using STI, however, a moat (or micro trench) in which an edge portion of the isolation film is sunken is generated. This moat is generated at the interface between the sidewall of the trenches and the HDP oxide film due to a cleaning process, which is repeatedly performed several times upon isolation film formation process using STI. It has been generally known that this moat is generated because the HDP oxide film is not sufficiently filled in that portion in terms of its structure and is thus relatively weak against a cleaning solution that is used during the cleaning process. This moat results in degraded operating characteristics of the semiconductor memory device. Particularly, in a NAND-type flash memory device, the moat has a great influence upon the threshold voltage of a cell, the leakage current, critical dimension of an active region and so on, which are electrical properties. It has recently becomes an important issue to control the depth of the moat.
Generally, in the case of a method for forming an isolation film of a Dynamic Random Access Memory (DRAM) device or a NAND flash memory device using STI, a cleaning process is performed approximately 10 to 15 times until the isolation film is formed after a trenches formation process. Usually, the cleaning process is performed using Diluted HF (DHF) and SC-1 NH4OH/H2O2/H2O) solution. In the case of the NAND-type flash memory device, a moat of about 150′ in depth is formed by this repetitive cleaning process. Among this repetitive cleaning process, the cleaning process for stripping a pad oxide film of a cell region after the HDP oxide film is deposited is carried out in order to recess a gate oxide film of a high voltage region and a low voltage region being a peripheral region at a given thickness as well as the stripping of the pad oxide film. In this case, in order to recess the gate oxide film at a given thickness, a time taken to perform the cleaning process is increased that much and the depth of the moat becomes deep accordingly. This degrades device characteristics.